A great number of current electrical appliances operate on direct current, and thus need direct-alternating current conversion since public electricity is alternating current. To reduce reactive power of an electronic system as well as to minimize current harmonics that cause system interference, a power factor corrector is prevailingly implemented in many electrical appliances that are required to have a high power factor and low current harmonics. A common power factor correction circuit stereotypically adopts a boost approach, which is however set back by a limitation that a direct-current output voltage is necessarily higher than a peak value of an alternating-current input voltage. Further, although other circuits capable of outputting a lower voltage by means of buck or buck-boost are available, these circuits suffer from drawbacks from having less satisfactory characteristics and efficiency, a large volume for a corresponding storage component, complex control means to low feasibilities.
FIG. 1A shows a boost converter circuit frequently adopted by a conventional power factor corrector, which is advantaged by having a higher power factor and simpler control means. FIG. 1B shows a schematic diagram of waveforms of an input voltage Vs and a current Is of the conventional power factor corrector in FIG. 1A, where ω is an angular frequency of public electricity, and Vm and Im respectively represent a voltage peak and a current peak. A current path of the boost converter circuit allows partial energy from a power source AC to directly charge a direct-current link capacitor CDC (as shown by a solid-line arrow in FIG. 1A). Therefore, an energy-storing inductor in the boost converter circuit only needs to store relatively lower energy, so that it has not only a smaller volume but also high efficiency. QPFC in FIG. 1A represents an active switch transistor, DPFC represents a diode, and a capacitor Cs may be designed based on actual requirements. However, accompanied with a high output voltage, power components of the above conventional power factor corrector are often encountered with a higher voltage stress. In addition, for a load with a lower voltage requirement (lower than a peak voltage of the power source), the conventional boost power factor corrector, instead of directly providing an appropriate power source, is only able to provide a rated voltage needed by the load after stepping down its output voltage via a buck converter circuit, as shown in FIG. 2. Yet, the above design increases a circuit size and production costs as well as circuit power consumption, such that conversion efficiency of an overall circuit is reduced as a result.
To optimize conversion efficiency of a circuit, a power factor corrector with a design of a buck converter circuit has also been proposed, as shown in FIG. 3A. A current path of a buck converter circuit also allows partial energy from the power source AC to directly charge the direct-current link capacitor CDC. Therefore, the energy-storing inductor in the buck converter circuit only needs to store relatively lower energy, so that it has not only a smaller volume but also high efficiency. A main shortcoming of the buck power factor corrector is that, when a power source voltage is lower than a direct-current output voltage, the circuit fails to induce an input current such that the input current becomes discontinuous, as shown in FIG. 3B. As a result, the buck power factor corrector has a lower power factor and larger current harmonics. In addition, the buck power factor corrector is further compromised by more complex control means.
There is also a buck-boost converter circuit (as shown in FIG. 4) or a fly-back converter circuit (as shown in FIG. 5) for serving as a power factor corrector. The two types of converter circuits above although indeed achieve a better power factor, due to the fact that the current path in converter circuits does not allow energy from the power source to directly charge the direct-current link capacitor, they are both disadvantaged by having a larger storage requirement for the inductor, a larger volume and poorer efficiency caused by magnetic energy loss.
There is yet another power factor corrector formed by integrating a boost converter circuit and a buck converter circuit, as shown in FIG. 6. An active switch transistor Q1 performs buck conversion when an active switch transistor Q2 is off; the active switch transistor Q2 performs boost conversion when the active switch transistor Q1 is off. However, unless being implemented in a customized integrated for a specific use, such design is extreme complex and is rather highly unfeasible and unpractical.
All the abovementioned conventional power factor correctors are disfavored by one common disadvantage—a large energy-storing capacitor CDC is required. To maintain a stable voltage at a load, an extremely small voltage change ΔV of the capacitor CDC is needed, which means that it is necessary that the capacitor CDC have sufficient capacitance for absorbing double-fold frequency power wave induced by the public electricity, as shown in FIG. 7. Limited by the extremely small voltage change ΔV for absorbing a difference between an input power and an output power, a capacitance of the direct-link capacitor needs to be very large.